TESTABILITY GUIDELINES

For The Design Of

PRINTED CIRCUIT BOARDS

 

 

7.0 COMPONENT INTERCONNECTS

7.1 BUSSED LINES

Bussed faults are among the hardest to diagnose and isolate. To prevent buss contentions it is important that each device on the buss can be tri-stated while other devices on the buss are being tested. All devices that drive a buss must be capable of being tri-stated and enabled individually.

7.2 FEEDBACK LOOPS (Refer to Fig. 2)

Feedback loops pose a serious problem for accurate fault diagnosis because the effect of a fault at any point in the loop may be felt at all points. Wherever feedback loops are used provisions should be made to allow them to be disabled during test. The methods used to disable feedback loops are listed in order of preference:

a. tri-statable buffers
b. Gates
c. Switches
d. Jumpers

7.3 WIRED ORS

Wired OR logic functions, like feedback loops, pose a serious problem for accurate fault diagnosis. The effect at one point will be detected as a fault at all points in the wired OR configuration. Wired ORS should be avoided whenever possible.

Any application in which two or more device outputs are tied together (i.e. for increased drive) should be avoided. If required by design, the output drivers must be on the same device.

7.4 DATA INPUTS (Refer to Fig. 3)

Unused data inputs on devices such as counters and buss drivers may be tied together and then to a pullup or pulldown resistor; but only on the same device or functionally independent devices.

7.5 SPARES

Termination of spare inputs is required, using pullup or pulldown resistors. Always show all spares on schematic.

7.6 POWER AND GROUND PINS

Show power and ground connections on schematic for all devices. They may be identified by means of a Power/Ground table or power and ground pins can be shown on the device.

Power distribution should take place across the entire board. A minimum of 3 test points are needed for each voltage. This is to insure sense lines are isolated from voltage producing lines and the amount of current drain is more distributed amongst several test points.

7.7 160 SERlES COUNTERS (7400 series)

Avoid the use of TTL 160 series counters. These counters do not have buffered outputs. The outputs are very unstable and problems such as ringing and false clocking to the next stage during testing can sometimes cause problems in certain board designs.

 

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Last modified: June 05, 2003