To insure full tester control over the board logic during in-circuit
test, the board design must provide the ability to disable or inhibit free running on
board clocks. All clocks must be able to be disabled or inhibited. Some methods are listed
in order of preference:
a. Gates
b. Clock Oscillator with disable pin
c. Analog Switch (electronic)
d. Switch
e. Jumper
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| The ability to manage and control multiple on board clocks of varying
frequencies becomes difficult if the clocks are derived from independent sources. All
frequencies should be derived from a single master clock. If the design needs more than
one source clock, these clocks should all be able to be disabled or inhibited. Use gates,
tri-statable buffers, or jumpers. |
| Along with having master control over lower frequencies derived from a
master clock, having independent control over all clocks may help in breaking feedback
loops and in temporarily isolating sections of logic during test. All lower frequency
clocks must be able to be independently disabled or inhibited. |
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