PLD Vector Test Input Files
The following input files are required to support PLD vector testing:
| Family |
Device Families |
Files Required |
| PAL |
16L8, 22V10, EP600,
ATV2500 |
.JED |
 |
|
|
| Actel |
ACT1, ACT2, ACT3,
1200XL,
3200DX, MX Series, SX Series |
.EDN & .PIN |
|
|
|
| Altera |
MAX 5000, 7000, 9000
FLEX 6000, 8000, 10K |
.EDO & .FIT |
|
|
|
| Cypress |
FLASH 370 Series |
.RPT,
.VHD & .XRF |
|
|
|
| Lattice |
pLSI/ispLSI 1000, 2000,
3000, 6000 |
.SIM |
|
|
|
| Lattice |
MACH1,
MACH2, MACH3,
MACH4, MACH5 |
.VHO & .RPT
(MACHXL)
.VHD & .XRF
(Design Direct) |
|
|
|
| QuickLogic |
pASIC 1, 2, 3 |
.EDO |
|
|
|
| Xilinx |
XC2000, XC3000, XC4000,
XC5200, XC7000, XC9500 |
.XNF (XACT)
.EDN (M1) |
|
Sparton |
.EDN |
|
Cool Runner |
.ANN & .FIT |
* Click on the file type for
instructions on generating the proper input files. |
